Pentium III

• Katmai - 0.25 µm process technology
  • Introduced February 26, 1999
  • Improved PII, i.e. P6-based core, now including Streaming SIMD Extensions (SSE)
  • Number of transistors 9.5 million
  • 512 KB ½ bandwidth L2 External cache
  • 242-pin Slot 1 SECC2 (Single Edge Contact cartridge 2) processor package
  • System Bus clock rate 100 MHz, 133 MHz (B-models)
  • Slot 1
  • Family 6 model 7
  • Variants
    • 450 MHz Introduced February 26, 1999
    • 500 MHz Introduced February 26, 1999
    • 550 MHz Introduced May 17, 1999
    • 600 MHz Introduced August 2, 1999
    • 533 MHz Introduced (133 MHz bus clock rate) September 27, 1999
    • 600 MHz Introduced (133 MHz bus clock rate) September 27, 1999
• Coppermine - 0.18 µm process technology
  • Introduced October 25, 1999
  • Number of transistors 28.1 million
  • 256 KB Advanced Transfer L2 Cache (Integrated)
  • 242-pin Slot-1 SECC2 (Single Edge Contact cartridge 2) processor package, 370-pin FC-PGA (Flip-chip pin grid array) package
  • System Bus clock rate 100 MHz (E-models), 133 MHz (EB models)
  • Slot 1, Socket 370
  • Family 6 model 8
  • Variants
    • 500 MHz (100 MHz bus clock rate)
    • 533 MHz
    • 550 MHz (100 MHz bus clock rate)
    • 600 MHz
    • 600 MHz (100 MHz bus clock rate)
    • 650 MHz (100 MHz bus clock rate) Introduced October 25, 1999
    • 667 MHz Introduced October 25, 1999
    • 700 MHz (100 MHz bus clock rate) Introduced October 25, 1999
    • 733 MHz Introduced October 25, 1999
    • 750 MHz (100 MHz bus clock rate) Introduced December 20, 1999
    • 800 MHz (100 MHz bus clock rate) Introduced December 20, 1999
    • 850 MHz (100 MHz bus clock rate) Introduced March 20, 2000
    • 866 MHz Introduced March 20, 2000
    • 933 MHz Introduced May 24, 2000
    • 1000 MHz Introduced March 8, 2000 (Not widely available at time of release)
    • 1100 MHz
    • 1133 MHz (first version recalled, later re-released)
    • 400 MHz (Mobile) Introduced October 25, 1999
    • 450 MHz (Mobile) Introduced October 25, 1999
    • 500 MHz (Mobile) Introduced October 25, 1999
    • 600 MHz (Mobile) Introduced January 18, 2000
    • 650 MHz (Mobile) Introduced January 18, 2000
    • 700 MHz (Mobile) Introduced April 24, 2000
    • 750 MHz (Mobile) Introduced June 19, 2000
    • 800 MHz (Mobile) Introduced September 25, 2000
    • 850 MHz (Mobile) Introduced September 25, 2000
    • 900 MHz (Mobile) Introduced March 19, 2001
    • 1000 MHz (Mobile) Introduced March 19, 2001
• Tualatin - 0.13 µm process technology
  • Introduced July 2001
  • Number of transistors 28.1 million
  • 32 KB L1 cache
  • 256 KB or 512 KB Advanced Transfer L2 cache (Integrated)
  • 370-pin FC-PGA2 (Flip-chip pin grid array) package
  • 133 MHz system bus clock rate
  • Socket 370
  • Family 6 model 11
  • Variants
    • 1133 MHz (256 KB L2)
    • 1133 MHz (512 KB L2)
    • 1200 MHz
    • 1266 MHz (512 KB L2)
    • 1333 MHz
    • 1400 MHz (512 KB L2)